Lifetime enhanced energy efficient wireless sensor networks using renewable energy

In this paper, we consider a remote environment with randomly deployed sensor nodes, with an initial energy of E0 (J) and a solar panel. A hierarchical clustering technique is implemented. At each round, the normal nodes send the sensed data to the nearest cluster head (CH) which is chosen on the probability value. Data after aggregation at CHs is sent to the base station (BS). CH requires more energy than normal nodes. Here, we energize only CHs if their energy is less than 5% of its initial value with the use of solar energy. We evaluate parameters like energy consumption, the lifetime of the network, and data packets sent to CH and BS. The obtained results are compared with existing techniques. The proposed protocol provides better energy efficiency and network lifetime. The results show increased stability with delayed death of the first node. The network lifetime of the proposed protocol is compared to the multi-level hybrid energy efficient distributed (MLHEED) technique and low-energy adaptive clustering hierarchy (LEACH) variants. Network lifetime is enhanced by 13.35%. Energy consumption is reduced with respect to MLHEED-4, 5, and 6 by 7.15%, 12.10%, and 14.975% respectively. The no. of packets transferred to the BS is greater than the MLHEED protocol by 39.03%

Effect of ESD on complex programmable logic device and field programmable gate arrays

Complex electronics devices are becoming more sensitive to electrostatic discharge (ESD). These components are being developed with higher density (extra memory bits per unit volume) and are becoming faster (MHz, GHz, THz, etc.). These upgrades in technology do not come without a "technological price". By enhancing the products' performance to meet the users' demands and requirements, one drawback is the reduction in the ESD sensitivity voltage levels. Indirect and direct air/contact discharge test has been conducted on the ALS-SDA-CPLD/FPGA trainer kit linked to the digital to analog converter (DAC) module. The Field Programmable Gate Arrays (FPGA) and Complex Programmable Logic Devices (CPLD) are found to be very ESD sensitive. The FPGA 3s50 IC was affected during the contact discharge to the input pin. There was damage to the bond pad as well as the metal top layer was damaged. The DAC ICs were affected during the ESD discharge " one due to direct ESD effects and the other due to indirect ESD effects. There was dielectric breakdown damage observed in the CPLD 9572 IC

An efficient ultra-wideband digital transceiver for wireless applications on the field-programmable gate array platform

The ultra-wideband (UWB) technology is a promising short-range communication technology for most wireless applications. The UWB works at higher frequencies and is affected by interferences with the same frequency standards. This manuscript has designed an efficient and low-cost implementation of IEEE 802.15.4a-based UWB-digital transceiver (DTR). The design module contains UWB transmitter (TX), channel, and UWB-receiver (RX) units. Convolutional encoding and modulation units like burst position modulation and binary phase-shift keying modulation are used to construct the UWB-TX. The synchronization and Viterbi decoder units are used to recover the original data bits and are affected by noise in UWB-RX. The UWB-DTR is synthesized using Xilinx ISE® environment with Verilog hardware description language (HDL) and implemented on Artix-7 field-programmable gate array (FPGA). The UWB-DTR utilizes less than 2% (slices and look-up table/LUTs), operates at 268 MHz, and consumes 91 mW of total power on FPGA. The transceiver achieves a 6.86 Mbps data rate, which meets the IEEE 802.15.4a standard. The UWB-DTR module obtains the bit error rate (BER) of 2×10-4 by transmitting 105 data bits. The UWB-DTR module is compared with similar physical layer (PHY) transceivers with improvements in chip area (slices), power, data rate, and BER. 

Mathematical analysis of ESD generated EM radiated fields on electronic subsystem

Electrostatic Discharge (ESD) generated Electromagnetic (EM) radiated fields can cause malfunctioning or upsets in an electronic system. This paper presents a mathematical computation of the effects of spatial electric fields from an ESD source. These fields may affect the normal functioning of an electronic system. This work uses a MATLAB program to model the response of Very High Frequency (VHF) amplifier to ESD generated radiated EM fields. The ESD source is a Capacitive Spark Discharge (CSD) source. The transient current element has been modeled as a short dipole. The electric field intensity and the magnetic field intensity have been computed by varying distance along the θ = π/2 direction for the CSD current. The frequency spectra of these E and H fields are obtained by taking Discrete Fourier Transform (DFT). The open circuit voltage induced by ESD generated transient fields at the antenna terminals and the voltage coupled to the input of the VHF amplifier fed by antenna is computed by varying distances. The time domain representation of the real part of the voltage at the output terminals of the VHF amplifier is computed by varying distance from the ESD source. Mathematical computation is carried out to predict the effect of the radiated fields on the induced voltages of a subsystem for various distances from the ESD source

Effect of Radiated Field Due to ESD on Ones and Zeroes of the Serial Data Stream

Abstract The circu it with an output of specified serial data stream has been exposed to the radiated electro magnetic fields generated by indirect discharge from the ElectroStatic Discharge (ESD) simulator. The circu it malfunctioned at a distance of 35 cm fro m the point of discharge. The ESD transient pulse introduced affected only the data stream and binary counter Integrated Circuit (IC) SN74LS393N was found to be malfunctioning. The counter IC passed the parameter test but failed functionally as all the output pins were malfunctioning. The circu it that failed did not have decoupling capacitors connected to the V cc supply. Another circu it designed with decoupling capacitors connected to the V cc supply of all the IC's has been exposed to indirect ESD air d ischarge. The effect of the ESD transient pulse on the ones and zeroes of the specified data stream has been observed. The amplitude of the serial data stream has been affected but the order of transmission of the bits has not changed. If the change in amplitude is greater than the set threshold then the order of transmission of bits can change and this becomes crit ical for sensitive circuits where the set threshold is very small. The decoupling capacitors provided protection against any malfunction of the integrated circuit

Effect of Electrostatic Discharge on Analog Circuits

Abstract — A study of the effects of ESD on analog circuit is carried out. The analog circuit is a RC phase shift oscillator followed by a zero crossing detector (ZCD). The analog circuit is subjected to indirect discharge on horizontal coupling plane and direct air discharge and the effects of ESD on oscillator and ZCD circuit are analyzed. The analog circuit is also modeled using five-spice to check if it is possible to simulate ESD events and predict its behavior. The simulation and experimental results show similar results though not identical in all the cases. Simulation becomes useful in predictions of the effect of ESD at various points in the analog circuit and this helps us in locating weak points of the circuit where extra protection may be needed

Development and Evaluation of Sustained Release Gastroretentive Minimatrices for Effective Treatment of H. pylori Infection

In the present work, sustained release gastroretentive minimatrices of amoxicillin have been designed and optimized using central composite design. Effect of amount of xanthan gum, rate controlling polymers (HPMC K100M CR/PEO coagulant (1:1)), carbopol 974P, and gas generating couple (sodium bicarbonate/citric acid (3:1)) was studied on dependent (response) variables, i.e., buoyancy lag time, drug release at 1 h, time required for 95% drug release, swelling index, and bioadhesive strength. Minimatrices were prepared by non aqueous granulation method using solution of PVP K30 in isopropyl alcohol. All the formulations were found to contain 99.2% to 100.9% of amoxicillin per minimatrix. Optimum formulation (Formulation number AGT09) containing high level of the independent variables was having buoyancy lag time of 7 min and drug release at 1 h was 32.5%. It required 9.39 h for 95% drug release while swelling index and bioadhesive strength were 341 and 17.9 dyn/cm2, respectively. This formulation was said to be optimum because it has minimum buoyancy lag time, requires maximum time for 95% drug release, and has higher bioadhesive capabilities. In vitro results of an optimized formulation indicate its sustained drug release and gastric retention capability, which may be very useful for effective treatment of H. pylori infection